The present invention relates to electrically programmable read only memory (EPROM) memory cells, and more particularly to an improved source bias generator circuit for aiding the programming efficiency of the EPROM cells.
EPROM memory cells employing hot electron programming techniques are programmed by application of high programming voltages to the gate and drain of the EPROM device during programming cycles. Process dependent characteristics of EPROM transistors affect the operating characteristics of the device during the programming cycle. For example, transistors characterized as "fast process corner" devices draw a relatively large current through the transistor during the programming cycle, and require relatively low voltages across the drain-to-source regions of the transistor in order to program. The drain-to-source programming voltage can get high enough so that the transistor goes into a breakdown condition (e.g., punchthrough and/or snapback) which can result in catastrophic damage to the chip or programming functional failure. EPROM transistors characterized as "slow process corner" devices have relatively low current through the drain-to-source channel, and subsequently require a relatively higher drain-to-source programming voltage in order to program.
"Fast process corner" characteristics are the processing characteristics that cause transistors to conduct higher currents than typical or nominal transistors under identical biasing conditions. "Slow process corner" characteristics are those processing characteristics that cause transistors to conduct less current than typical or nominal transistors under identical biasing conditions.
One prior method previously considered to improve EPROM programming is to intentionally increase the passive resistance of the EPROM cell's source node. Using a passive resistance has the drawback of not tracking with the process variations that affect EPROM programming efficiency. This lack of tracking results in decreased programming efficiency in many process corners, and fails to fully optimize programming efficiency for each specific device.
It is therefore an object of the present invention to provide a circuit for improving the programming efficiency of an EPROM memory cell that uses hot electron programming techniques.
A further object of the invention is to provide a source bias generator circuit which biases the voltage at the EPROM transistor source so as to track with the process variations that affect EPROM programming efficiency.